Current leveling layer integrated with aperture for intracavity device

ABSTRACT

A vertical cavity surface emitting laser (VCSEL) includes a semiconductor device having a pair of mirror portions, an active region, a tunnel junction, a pair of cladding layers and a substrate. Heat generated by the VCSEL dissipates through the cladding layers, which utilize an indium phosphide material. The VCSEL also includes selective etches that are used to aperture the active region to allow electric current to be injected into the active region.

[0001] The contents of this application are related to those provisionalapplications having Ser Nos. 60/227,165, 60/227,161, and 60/226,866,filed Aug. 22, 2000, and a provisional application having Ser. No.60/262,541, filed Jan. 16, 2001. The present application claims priorityto these related provisional patent applications and their contents arehereby incorporated by reference in their entirety into the presentdisclosure. The contents of this application are also related to severalnonprovisional patent applications being filed concurrently herewith.These nonprovisional patent applications are hereby incorporated byreference in their entirety and have the following attorney docketreference numerals: 510015-263, 510015-264, 510015-265, 510015-266,510015-268, 510015-269, 510015-270, 510015-271, and 510015-272.

[0002] This invention was made with the support of the United StatesGovernment under Grant No. MDA972-98-1-0001, awarded by the Departmentof Defense (DARPA). The Government has certain rights in this inventionunder 35 U.S.C. §202.

BACKGROUND OF THE INVENTION

[0003] 1. Field of the Invention

[0004] The invention relates in general to a vertical cavity surfaceemitting laser (VCSEL). More particularly, the invention relates todouble-intracavity contacted long-wavelength vertical cavity lasers.

[0005] 2. General Background and State of the Art

[0006] Semiconductor lasers are widely used in optical applications, inpart because semiconductor fabrication techniques are relativelyinexpensive and yield reliable, consistent results. Also, they areeasily packaged into current microelectronics. A relatively new class ofsemiconductor lasers, vertical cavity surface emitting lasers (VCSELs),has been developed through the evolution of this technology. Unlikeconventional edge emitting lasers that emit light in a directionparallel to the semiconductor substrates where the lasers are formed,VCSELs have optical cavities perpendicular to the substrate, and thusemit optical radiation in a direction perpendicular to the substrate andperpendicular to a p-n junction formed between layers grown on thesubstrate. In addition to various performance and application-adaptableimprovements created thereby, VCSELs simply require reduced complexityin their fabrication and testing, as compared to conventional edgeemitting semiconductor lasers.

[0007] Vertical cavity surface emitting lasers (VCSELs) have been provento be solutions for low-cost transmitters for high-speed datacommunications at 980 nm and 850 nm and have shown great potential forcost-effective telecommunication systems at longer wavelengths as well,such as 1.55 μm and 1.3 μm. These long wavelength VCSELs will satisfyincreasing demand for high speed data transmission over tens ofkilometers. 10-Gigabit Ethernet is one example, which requiresinexpensive transmitters with a data rate of 10G bit per second (Gbps)and up to 40 km reach over single-mode fiber.

[0008] VCSELs are semiconductor lasers having a semiconductor layer ofoptically active material, such as gallium arsenide or indium galliumarsenide or the like, sandwiched between highly-reflective layers ofmetallic material, dielectric material, epitaxially-grown semiconductordielectric material or combinations thereof, most frequently in stacks.As is conventional, one of the mirror stacks is partially reflective soas to pass a portion of the coherent light built up in the resonatingcavity formed by the mirror stack/active layer sandwich. Laserstructures require optical confinement and carrier confinement toachieve efficient conversion of pumping electrons to stimulated photons(a semiconductor may lase if it achieves population inversion in theenergy bands of the active material.)

[0009] While both short wavelength and long wavelength VCSELs haveproven to offer excellent solutions for many applications in theevolving optical applications marketplace, they also have certainlimitations and drawbacks that are well known in the art. Some of thedrawbacks are associated with the need to electrically pump as well asconduct heat through the multi-layer mirror stacks, which exhibit poorelectrical and thermal conductivities. Other drawbacks to VCSELperformance include high threshold current and high operating voltage.Mirror stacks lattice-matched to InP, as desired for high-reliabilitylong wavelength operation, have limited thermal conductivity, and ifdoped sufficiently to provide useful electrical conductivity, alsocreate excessive optical loss.

INVENTION SUMMARY

[0010] The present invention provides a novel approach to overcoming thedrawbacks of existing VCSELs by presenting a double intracavitycontacted VCSEL having a selectively apertured active region. Thepresent invention provides a new design and method of manufactureallowing for room temperature, continuous-wave (CW) operation ofAsSb-based VCSELs by providing thick indium phosphide (InP) claddinglayers having very thin heavily-doped contact layers in adouble-intracavity structure.

[0011] The present invention has several features combined togetherresulting in improved thermal characteristics as well as reduced currentand optical losses. These combined features include:

[0012] 1. thick n-type cladding layers;

[0013] 2. very thin, heavily-doped, n-typed contact layers and a verythin, heavily-doped, tunnel junction; and

[0014] 4. an aperture formed from the active region.

[0015] The thick, n-type cladding layers provide low-impedance currentand heat paths avoiding conduction through poor optically andelectrically conducting distributed Bragg reflectors, also known as DBRsor Bragg mirrors. The low-impedance heat path reduces the devicetemperature. The low-impedance current path results in a lower deviceoperating voltage which also reduces the device temperature. Because thecurrent path is through the cladding layers, there is no need to dopethe DBRs and substrate, resulting in reduced free carrier absorption andreduced optical loss. Optical loss is also decreased because thecladding layers are n-type rather than p-type.

[0016] The very thin, heavily-doped n-type contact layers lower theimpedance of the current path by providing better electrical contactwith attached contacts. The heavily-doped tunnel junction provides ahole source allowing both cladding layers to be substantially n-type,reducing optical loss and decreasing impedance. The heavily-dopedcontact layers are thin, reducing optical loss since the majority of thecontact layer volume can be doped at a lower level. Additionally, theheavily-doped contact layers are located at standing-wave nulls in thelaser cavity, reducing free carrier absorption. Selective etchingsenable the exposure of such thin, heavily doped, contact and tunneljunction layers.

[0017] The aperture formed in the active region confines the current tothe desired area of the active region, reducing the device voltage. Theoptical mode is also confined, reducing optical loss and lowering thethreshold current. The optical mode is confined by the aperture,resulting in reduced optical loss at the sidewall of the etched-pillarDBR, lower threshold current, lower threshold current density, largerdifferential quantum efficiency and higher output power.

[0018] The method of increasing the processing efficiency of a VCSELalso includes removing a first, or top, DBR by applying a firstselective etch, removing a first, or top, cladding layer by applying asecond selective etch, and removing the active region by applying athird selective etch to form an undercut aperture in the active regioninto which electric current can be confined. Additionally, the presentinvention further provides the first room temperature, continuous-wave(CW) operation of a 1.55-μm vertical-cavity surface-emitting laser(VCSEL) that is completely lattice-matched to InP and produced in oneepitaxial growth.

[0019] Accordingly, it is one object of the present invention to providefor room temperature, continuous-wave (CW) operation of AsSb-basedVCSELs by including indium phosphide (InP) cladding layers having verythin heavily-doped contact layers in a double-intracavity structure. Itis another object of the invention to provide a method of increasing theprocessing efficiency of a VCSEL by selectively etching an undercutaperture into the active region and injecting current into the activeregion.

[0020] Another object of the present invention is to provide a roomtemperature, continuous-wave (CW) operation of a 1.55-μm vertical-cavitysurface-emitting laser (VCSEL) that is completely lattice-matched to InPand produced in one epitaxial growth.

[0021] Other objects of the present invention are to reduce elevatedtemperatures in the VCSEL, minimize optical loss associated withheavily-doped contact layers, reduce threshold current and operatingvoltage, and improve thermal conductivity and electrical resistivity inthe VCSEL.

BRIEF DESCRIPTION OF THE DRAWINGS

[0022]FIG. 1 is schematic representation of double intracavitycontacted, long wavelength VCSEL;

[0023]FIG. 2 is a table showing thermal conductivity and electron andhole mobility of various materials used in VCSEL design;

[0024]FIG. 3 is a plot of standing wave distribution in a 3.5λ cavity ofa double intracavity contacted VCSEL;

[0025]FIG. 4 is a schematic representation of a selective etch processof producing the VCSEL of the present invention;

[0026]FIG. 5 is a close-up schematic representation of a VCSEL havingcontacts placed at positions where selective etches have removedportions of the VCSEL structure;

[0027]FIG. 6 is a schematic representation of a VCSEL showing the flowof current and heat through contacts and cladding layers;

[0028]FIG. 7 is a picture of a VCSEL having an undercut aperture formedby selectively etching the active region;

[0029]FIG. 8 is a plot of continuous wave light characteristics of adouble intracavity contacted VCSEL with 16 μm pillar and 8 μm aperture;

[0030]FIG. 9 is a plot threshold current density vs. temperature of adouble intracavity contacted VCSEL for pulsed operation;

[0031]FIG. 10 is a plot of lasing spectrum at 7.5 times threshold for adouble intracavity contacted VCSEL;

[0032]FIG. 11(a) is a plot of operating voltage for a double intracavitycontacted VCSEL with 8 μm or 12 μm aperture;

[0033]FIG. 11(b) is a plot of thermal impedance vs. aperture diameterfor a double intracavity contacted VCSEL with 16 μm pillar;

[0034]FIG. 12 is a plot of temperature rise in a double intracavitycontacted VCSEL with 16 μm pillar and 8 μm aperture and a plot oftemperature rise in air-post VCSELs (where current is injected throughDBRS);

[0035]FIG. 13(a) is a plot of light output characteristics of a doubleintracavity contacted VCSEL with 16 μm pillar and 8 μm or 12 μmaperture;

[0036]FIG. 13(b) is a plot of light output characteristics of a doubleintracavity contacted VCSEL with a 10 μm aperture and 16 μm (solid)pillar or 12 μm (dashed) pillar;

[0037]FIG. 14 is graphical representation showing the reduction inthermal impedance in a VCSEL with flip-chip bonding;

[0038]FIG. 15 is a schematic representation of the application of a 5VDC power supply to a VCSEL in a solution of citric peroxide;

[0039]FIG. 16 is a diagrammatic view of a portion of a VCSELillustrating a tunnel junction and contact layers;

[0040]FIG. 17 graphically illustrates optical output power and voltageas a function of current through the VCSEL;

[0041]FIG. 18 graphically illustrates resistivity and optical loss as afunction of doping level for the Silicon doped InP;

[0042]FIG. 19 illustrates I-V plots for three different types of tunneljunctions;

[0043]FIG. 20 provides an estimate of the current density versusdistance dependence which is derived for an InP current spreading layerwith an InP/InAlAs tunnel junction; and

[0044]FIG. 21 illustrates the injected current path crowded at the edgesof the aperture.

DETAILED DESCRIPTION OF THE EMBODIMENTS

[0045]FIG. 1 is a schematic representation of a long wavelength VCSEL 10having two InP layers 12 a, 12 b cladding an InAlGaAs-based activeregion 14, such that the active region 14 is disposed between the twoInP layers 12 a, 12 b to form a double intracavity contacted structure.A tunnel junction 16 located between one of the InP layers 12 a and theactive region 14 generates holes for quantum wells in the active region14 and allows both of the InP cladding layers 12 a, 12 b to be n-type.Only the InP cladding layers 12 a, 12 b, the tunnel junction 16 and partof the active region 14 are doped. Holes are created by the extractionof electrons from the valence band of a p-type layer in the tunneljunction 16. This design allows for the two n-type cladding layers 14which have both higher electrical conductivity and lower optical lossthan similarly-doped p-type layers. The tunnel junction 16 itself is ata standing-wave null of the cavity mode to minimize the absorptionassociated with the higher doping at this interface. The VCSEL 10 alsoincludes first and second Sb-based mirror portions 18, 20 (also called adistributed Bragg reflector, or DBR). The contact scheme enables currentto be injected through the InP cladding layers 12 a, 12 b and bypass thefirst and second mirror portions 18, 20, and it eventually reducesseries resistance of the VCSEL. The DBRs 18 and 20 are undoped, Sb-basedmulti-layered structures and may include alternating layers of aluminumarsenic antimonide (AlAsSb) and aluminum gallium arsenic antimonide(AlGaAsSb).

[0046] The double intracavity contacted structure also allows heatgenerated inside the VCSEL 10 to bypass the first and second mirrorportions 18 and 20 in the same manner with the injected current, suchthat most of the heat comes out of the VCSEL 10 through the two InPcladding layers 12 a, 12 b and contacts 22. This provides the VCSEL 10with low thermal impedance in spite of the fairly low thermalconductivity of the Sb-based DBRs. The high electron mobility and thehigh thermal conductivity of InP provides low electrical and thermalimpedance for the VCSEL 10 and prevents the VCSEL 10 from over-heating.Low electrical and thermal impedance is very useful for VCSELs operatingat long wavelengths where a dominant non-radiative recombination processis an Auger recombination, which reduces injection efficiency andincreases exponentially with temperature. FIG. 2 is a table detailingthe thermal conductivities and electron and hole mobilities of materialsin the design of the double intracavity contacted VCSEL 10.

[0047] The intracavity contacts allow the VCSEL10 to utilize undopedDBRs 18 and 20 and an undoped substrate 32, reducing free-carrierabsorption in the VCSEL 10. The free-carrier absorption is furtherreduced by the decreasing doping level of the n-type InP cladding layers12 a, 12 b without significant increase of the series resistance due tothe high electron mobility of InP. In the double intracavity contacteddesign, scattering loss at the sidewall of the DBRs must also beminimized. The scattering loss is reduced by employing an undercutetched aperture smaller than the etched pillar formed by the first andsecond mirror portions 18, 20. An oxide aperture may also be used toprovide current as well as optical confinement for shorter-wavelengthGa-based VCSELs. In the double intracavity design, however, an undercutetched aperture is employed instead of an oxide aperture and is formedby selectively etching an InAlGaAs-based active region with a mixture ofcitric acid and hydrogen peroxide as discussed herein. An advantage ofan undercut aperture is that this constrains current exactly into thedesired area of the active region, and there is no current spreadingbetween the current aperture and the active region as is seen in oxideapertures. Surface-recombination appears to be low in the 1.55 μm activeregions.

[0048] The double intracavity contacted long wavelength VCSEL 10 may begrown in a single step using molecular beam epitaxy in which the wholestructure is completely lattice-matched to InP. In one embodiment, thefirst and second DBRs 18 and 20 use 30.5 periods and 21.5 periods ofAl_(0.15)Ga_(0.85)As_(0.58)Sb_(0.42)/AlAs_(0.56)Sb_(0.44), respectively.This material combination has an index contrast of 0.47, which brings acalculated reflectivity of >99.9% for the first DBR 18. The measuredtransmission of the second DBR 20 is 1.2%. The 1.5λ-thick InP claddinglayers 12 a, 12 b located on the top and bottom of the active region 14are both n-type doped 5×10¹⁷ cm⁻³ with silicon (Si), with top surfacecontact layers 10 nm thick doped 5×10¹⁸cm⁻³ with Si. InP doped with Sito a level of 5×10¹⁷ cm⁻³ has an absorption coefficient of 2.5 cm⁻¹. Ann-type layer of the tunnel junction 16 is 20 nm of InP doped 3×10¹⁹cm⁻³with Si, and a p-type layer is 20 nm of AlInAs doped 1×10²⁰cm⁻³ withcarbon (C).

[0049] The active region 14 is based on an AlGaInAs material system andincludes five strain compensated InAlGaAs quantum wells. This activeregion 14 has large conduction band offsets and is promising for hightemperature operation. With this active region 14, 10 Gbps operation athigh temperatures (85° C.) has been demonstrated using an uncooled ridgewaveguide laser. The whole cavity including the active region 14 and InPcladding layers 12 a, 12 b is 3.5λ thick. The grown cavity has aresonance wavelength of 1550 nm, the active region 14 has a photoluminescence peak of 1510 nm, and this gain offset puts the thresholdminimum around room temperature.

[0050]FIG. 3 is a plot of the standing wave distribution of a VCSEL 10,in which three arrows indicate the positions of heavily-doped layers.All heavily-doped layers, i.e. the InP cladding layers 12 a, 12 b andtunnel junction 16, are located at standing-wave nulls in the lasercavity, so that free-carrier absorption is reduced as much as possible.

[0051]FIG. 4 is schematic representation of the process of fabricating adouble intracavity, long wavelength VCSEL 10. Exposing the InP contactlayers 13, 21 of the cladding layers 12 a, 12 b (see FIG. 16) is one ofthe most critical steps in the fabrication process of the doubleintracavity contacted VCSEL. The contact layers 13, 21 must be exposedto allow for current to be injected through contacts 22. To expose thefirst contact layer, a portion of the top mirror is removed. To exposethe second contact layer 21, portions of the cladding layer 12 a andactive region 14 are then removed. The contacts 22 may be made of metalsthat include but are not limited to nickel, gold, germanium and/or otherconducting materials.

[0052] Since the contact layer thickness should be minimized to reducefree carrier absorption in the cavity, the various selective etches areused to control etching depth precisely when the contact layers areexposed. To reach the first InP cladding layer 12 a at least a portionof the first mirror portion 18 is removed. For long wavelength VCSELs 10grown epitaxially on InP, these DBRs 18 are typically AlGaAs, InAlGaP orAlGaAsSb-based. A first selective etch 24 is a low voltage reactive ionetch (RIE) using chlorine (Cl₂)gas that etches through either type ofDBR 18 but does not etch the InP cladding layer 12 a, so that theetching stops at the very top of the cladding layer 12 a. Thistransition is caused by the formation of a non-volatile InCl₂ layer onthe surface of the contact layer 13 and is easily identified during theRIE using an in-situ laser monitor. Although the selectivity of AlGaAsSbto InP is not so large (around 6:1), the RIE exposes the very thin (10nm) top contact layer 13 by combining the selective RIE with the in-situmonitoring.

[0053] The first etch 24, therefore, stops exactly where the firstcontact 22 for the double intracavity VCSEL 10 is deposited. The firstcontact layer 13 is therefore very thin (<100Å), minimizing the opticalloss associated with this layer.

[0054] A second InP cladding layer 12 b lies below the first InPcladding layer 12 a and the active region 14. By choosing aAlInGaAs-based active region, common in long-wavelength lasers, two moreselective etches can be employed to reach this second cladding layer 12b without excessive processing difficulty.

[0055] A second selective etch 26, which is a RIE which includes methaneand hydrogen (CH₄/H₂) gases and which is standard for InP etching,removes at least a portion of the first InP cladding layer 12 a butstops on the top InAlAs layer of the active region 14. Selectivity ofthis second selective etch is, in one embodiment, a 16:1 selectivity. Inone embodiment, argon (Ar) gas may also be used in combination withmethane and hydrogen in the second selective etch 26. In anotherembodiment, nitrogen (N₂) gas may also be used in combination withmethane and hydrogen. A third selective etch 28, which includes amixture of citric acid and hydrogen peroxide, then removes at least aportion of the InAlGaAs active region but does not etch the secondcontact layer 21 (see FIG. 16) with a selectivity of more than 100:1. Inone embodiment, the selectivity of this third etch is 80:1. This InPcontact layer of the cladding layer 12 b, therefore, can also beconfined to the top 100Å. The third selective etch 28 is also used toundercut the active region to aperture the VCSEL 10.

[0056]FIGS. 5 and 6 are schematic representations of VCSELs 10 havingcontacts 22 placed at positions where the above selective etches haveremoved portions of the VCSEL structure. FIG. 5 shows a diagrammaticrepresentation of an circuit model in the VCSEL. FIG. 6 shows adiagrammatic representation of a VCSEL 10 having contacts 22. As voltageis applied across the contacts 22, a current path 29 flows through thecontacts 22, the InP cladding layers 12 a, 12 b and the apertured activeregion 14 such that the current 29 is constrained in the middle of theactive region 14 due to the etched away portion at the side of theactive region. The heat flows through the heat path 31.

[0057] In an alternative embodiment, the cladding layer 12 b is not usedas an intracavity contact. Rather, the current path extends from thecontact 22 of the cladding layer 12 a and through the substrate 32. Inthis embodiment the substrate 32 and mirror 20 should be doped toprovide a conductive path. This embodiment maintains some thermalbenefits of the cladding layers 12 a, 12 b and undoped top mirror 18.Advantages of an undoped bottom mirror 20 and undoped substrate 32 alongwith the bipassing of the current flow away from the mirror 20 arecompromised in favor of extra fabrication simplifications. The claddinglayer 12 b can be kept in the structure to serve as a heat spreadinglayer even though not used as an intracavity contact. Alternatively, thecladding layer 12 b can be removed from the structure to provide furtherfabrication simplifications.

[0058]FIG. 7 is a close-up picture of a VCSEL 10 having an etched gap30. The etched gap 30 creates the undercut aperture having a disk-likeshape etched in the active region 14. An undercut aperture 14 isutilized in the VCSEL 10 to constrain injected current into the areaunderneath the etched-pillar DBR and minimize optical scattering loss atits sidewall. The citric acid—hydrogen peroxide mixture of the thirdetch 28 selectively etches InAlGaAs and not InP, forming the undercutaperture 30. The selectivity (>100:1) is large enough so that theundercut aperture deeper than 10 μm can be formed with little decreaseof the InP cladding layers 12 a, 12 b. This third etch 28 also showsselectivity between InAlAs and InGaAs, and it produces a slight taperedaperture as seen in FIG. 7. The etching depth was monitored usingcircular InP bumps with different diameters which sit on the same waferwith the devices. These InP bumps have an InAlGaAs layer, the same layeras the active region, and this InAlGaAs layer is also etched when theundercut aperture 30 is formed. The undercut depth was determined bychecking the diameter of the largest bump which was etched off.

[0059] The undercut aperture is formed by selectively etching the activeregion after the other layers have been etched by other selectiveetches. The undercut aperture is formed as the third selective etch isapplied from the outside of the VCSEL 10 toward the inside of the activeregion from either side. Thus, an undercut aperture is formed by etchingaway portions of the active region from the outside and working inwardtoward the center of the VCSEL structure.

[0060] In another embodiment, the VCSEL 10 may be etched beginning witha substrate 32, followed by the bottom mirror portion 20 such that theVCSEL 10 is etched from the bottom up to the active region 14. Afteretching at least a portion of the substrate 32 and at least a portion ofthe bottom DBR 20, at least a portion of the bottom cladding layer 12 bis then etched to allow access to the active region 14. The activeregion 14 is then etched by applying the citric acid—hydrogen peroxidethird selective etch 28 and aperturing a portion of the active region toallow current 29 to be constrained into the center of the active region14.

[0061]FIG. 8 is a plot of the L-I characteristics of the VCSEL 10 with a16 μm etched pillar and an 8 μm undercut aperture, measured at varioustemperatures under both continuous wave and pulsed operation. At 25° C.,the threshold current and threshold density are 800 μA and 1.6 kA/cm²,respectively, and the differential quantum efficiency is 23% at maximum.The maximum continuous wave output power is 1.05 mW at 20° C. and 110 μWat 88° C., and the VCSEL 10 operates up to 88° C. FIG. 9 is a plot ofthe threshold current density under pulsed operation as a function oftemperature. The threshold current density is minimized at about 25° C.,indicating that the gain peak wavelength matches the cavity mode at thistemperature. Larger gain offset will increase the maximum operationtemperature as well as the output power at high temperature. The lasingspectrum is also measured. FIG. 10 is a plot of lasing spectrum at 7.5times threshold for a double intracavity contacted VCSEL10. A VCSEL 10with 14 μm etched pillar and an 8 μm aperture lases at 1.56 μm and showsa single-mode operation up to its maximum output, and the side-modesuppression ration is 39 dB. From FIG. 10, it is seen that the smallerpillar adds some level of mode selective loss.

[0062] These excellent results, such as high temperature operation andhigh output power, are attributed to three primary benefits resultingfrom the VCSEL structure of the present invention: low operatingvoltage, low thermal impedance, and low scattering loss.

[0063] Low values of operating voltage and thermal impedance result fromthe double intracavity-contacted structure with the thick, n-type InPlayers. FIGS. 11(a) and 11(b) show graphical representations ofadditional benefitsof using InP cladding layers in VCSEL design. FIG.11(a) is a plot of operating voltage for a double intracavity contactedVCSEL showing injected current vs. voltage characteristics for differentaperture diameters. FIG. 11(b) is a plot of the thermal impedance as afunction of aperture diameter. Both figures also show the data forair-post VCSELs, in which current is injected through the Sb-based DBRs.The double intracavity contacted design provides much lower electricaland thermal impedance when compared with air-post VCSELs. FIG. 12 is aplot of temperature rise in a double intracavity contacted VCSEL with 16lμm pillar and 8 μm aperture and a plot of temperature rise in air-postVCSELs. The double intracavity-contacted VCSEL with a 16 μm pillar andan 8 μm aperture shows a threshold voltage of 1.4V and thermal impedanceof 2.2° C./mW, whereas the 15 μm air-post VCSEL shows a thresholdvoltage of 7.0V and a thermal impedance of 4.1° C./mw. These differencesindicate that in the double intracavity-contacted structure both theinjected current and generated heat bypass the AlAsSb/AlGaAsSb DBRs,which have poor thermal and electrical conductivity. These low valueseventually decrease the device temperature, resulting in good thermalproperties of the VCSELs. The temperature rise in the InP intracavityVCSEL is less than 10° C. at threshold, which is much lower than theair-post VCSELs (>100° C.), even though the aperture, which correspondsto a cross section of current and heat paths, is smaller for theintracavity VCSEL (8 μm) than for the air-post (15 μm).

[0064] Moreover, the voltage and thermal impedance do not change muchwith the aperture diameter in the double intracavity-contactedstructures as can be seen in the air-post structure, and hence theaperture can be made smaller with little increase in the devicetemperature. Since a vertical flow of the heat or current in the VCSELdepends on the cross section of the aperture, less dependence of thevoltage and thermal impedance on the aperture size shows that in theintracavity-contacted VCSELs the InP cladding layers work as current andheat spreaders and a lateral flow in the InP cladding layers is dominantfor both the injected current and generated heat.

[0065] Another benefit, low scattering loss, is introduced into theVCSEL 10 by the undercut aperture 30. FIG. 13(a) is a plot of lightoutput characteristics of a double intracavity contacted VCSEL with 16μm pillar and 8 μm or 12 μm aperture. The VCSEL 10 with the smalleraperture shows not only a lower threshold current, but also a lowerthreshold current density, a larger differential quantum efficiency andhigher output power. In FIG. 13(b), the L-I characteristics are comparedbetween the two VCSELs with the same 10 μm aperture diameter anddifferent pillar diameters. The larger pillar corresponds to the deeperundercut. The temperature rise estimated using the measured thermalimpedance and dissipated power is also shown. Since the devicetemperature is almost the same for both VCSELs, they must experiencealmost the same free-carrier absorption and the same injectionefficiency, both of which strongly depends on the device temperature.Despite this fact, the VCSEL with the larger pillar, i.e. the deeperundercut, shows better performance in the L-I characteristics. Byincreasing the undercut from 1 μm (12 μm pillar) to 3 μm (16 μm pillar),the differential quantum efficiency was increased from 7.2% to 17.5%,and the maximum lasing temperature was increased from 55° C. to 75° C.The deeper undercut reduces more scattering loss at the sidewall of theetched pillar and provides the better L-I characteristics.

[0066] Even with the use of the two InP cladding layers 12 a, 12 b,however, a large amount of heat generated by the active region 14 duringperformance of the VCSEL dissipates through the second mirror portion 20instead of through the contacts 22 placed near the active region 14. Inone embodiment, a method of heat sinking the VCSEL known as flip-chipbonding is used to provide high heat conductivity through a heat sinkingsubstrate. FIG. 14 is graphical representation showing the reduction inthermal impedance in a VCSEL with flip-chip bonding. In FIG. 14, thesubstrate 32 is still one of the dominant heat paths, but by heatsinking to the substrate 32, the thermal impedance of the contacts isreduced from measured value of 2.2° C./mW to 1.2° C./mW for a 8 μmaperture. In this embodiment, a metal contact design such asgold-to-gold (Au-to-Au) bonding prevents the increase of thermalimpedance due to the bonding of the contacts 22 to the active region 14.Substantial improvement in the thermal impedance results when the VCSELis flip-chip bonded directly to a heat-sinking substrate with a seriesof bumps, which may be made of indium phosphide. Heat generated in theactive region is conducted to the heat-sink through the InP layers inthe bumps, which have a very high thermal conductivity.

[0067] In another embodiment, the VCSEL 10 is etched after all otherprocessing has been completed, including the placement of contacts 22.This is done in order to take advantage of the high selectivity of thecitric acid-hydrogen peroxide mixture in the etching of the activeregion. However, the etch rates of this citric acid-hydrogen peroxidemixture are dramatically affected when contacts are in place, slowingthe undercut to 40% of the rate without contacts and therefore slowingthe processing rate. Such effects are commonly seen inmetal-semiconductor systems since the metal can change the potential ofthe semiconductor material with respect to the etching solution. FIG. 15shows one way to overcome these effects by biasing the VCSEL 10 withrespect to the solution. In FIG. 15, VCSEL structures with contacts 22are coupled to a DC power supply 34 and are placed in a citricacid-hydrogen peroxide mixture. When a +5V bias is applied to the VCSEL10, undercut etching of the InAlGaAs material is decreased.Additionally, the etching of the other n-type material is promoted. Theetching rate of the heavily-doped n-type InP is as large as the etchingrate of the InAlGaAs. By applying a −5V bias, however, the etching rateof the InAlGaAs not only returns to pre-metal levels but actually isslightly faster.

[0068] Returning to describe the tunnel junction 16 in more detail withreference to FIG. 16, the tunnel junction 16 is partly formed in the InPcladding layer 12 a and partly in the InAlGaAs active region 14. Theportion formed in the InP cladding layer 12 a can be designated as then-type tunnel junction portion 17 and the portion formed in the InAlGaASactive region 14 can be designated as the p-type tunnel junction portion19. The InP cladding layers 12 a, 12 b are Si n-type doped to a level of5×10¹⁷cm⁻³. The cladding layers 12 a, 12 b have a heavily-doped contactlayers 13, 21 at their upper surfaces. The contact layers 13, 21 can, inone embodiment, be less than 100Å thick and can be doped with Si to adensity of 5×10¹⁸ cm⁻³. The n-type tunnel junction portion 17 can, inone embodiment, be less than 200Å thick, and in particular can be lessthan 100Å thick, and can be doped with Si to a density of 5×10¹⁸ cm⁻³.Thus, the cladding layer 12 a has a doping profile having increaseddoping levels at each surface. The p-type tunnel junction portion 19 canbe less than 200Å thick, and preferably less than 100Å thick, and can becomposed of InAlAs doped to a level of 1×10²⁰cm⁻³. The InAlAs can bedoped with acceptors such as Carbon, or CBr4, for example.

[0069] The mixture of citric acid and hydrogen peroxide selectivelyetches away the p-type InAlAs tunnel junction portion 19 along with theInAlGaAs active region 14, but leaves the n-type InP tunnel junctionportion 17 substantially in place. This remaining n-type InP tunneljunction portion 17 can be desirable because it provides additionallateral conductivity from the laterally offset contacts 22 to the activeregion 14.

[0070] The tunnel junction 16 allows for the use of n-doped claddinglayers 12 a, 12 b. This results in reduced electrical resistance andreduced free carrier optical absorption than in p-type layers having thesame doping level. A VCSEL with n-type cladding layers 12 a, 12 benabled by the tunnel junction 16 achieves low dissipated power and highdifferential efficiency simultaneously, resulting in higher powerefficiency. The tunnel junction 16 converts the electrons to holes justin time for the active region. In the double intracavity-contacted VCSEL10 of FIG. 1, where electrical contact is made through the claddinglayers 12 a, 12 b, the n-type doping combined with the tunnel junction16 is particularly beneficial. If one of the cladding layers 12 a, 12 bwere a p-type cladding layer then much of the reduction in optical lossfrom using undoped DBRs would return in the thick p-type cladding layer.Not only is the loss associated with the p-type material greater, butthe doping level has to be higher in p-type layers since hole mobilityis comparatively low and the layers themselves have to be fairly thickto minimize the electrical resistance. Optical loss in the p-typecladding layers, therefore, is a limiting factor if used in doubleintracavity-contacted VSCELs. N-type material, on the other hand, has ahigh electrical conductivity even for low doping levels (and, again,lower loss at those doping levels). The electrical conductivity andoptical loss as a function of doping level for the Silicon doped InP,for example, are shown in FIG. 18. The highly doped n-type tunnel diodeportion 17 of the cladding layer 12 a is located at a standing-wave nullin the laser cavity, minimizing free carrier absorption that woulddiminish the advantages of the overall low level doping of the claddinglayer 12 a. Despite the low doping of the contact layers, the voltage ofthe VCSEL 10 is very low as shown in FIG. 17. This low doping level alsodecreases the loss in the structure, enabling high efficiencies alsoseen in FIG. 17.

[0071] The tunnel junction 16 also serves the important function ofspreading current across the aperture, or active region 14. In thepresent embodiment, the aperture is formed in the active region 14 andthe layer 19. However, in other embodiments the aperture can be formedat other locations so long as it confines the current and optical mode.The tunnel junction 16 can also be located at positions other thanbetween the active region 14 and the cladding layer 12 a. For example,the tunnel junction 16 can be formed entirely within the cladding layer12 a. As shown in FIG. 21, without the tunnel junction the injectedcurrent path 29 tends to crowd at the edges 23 of the aperture or activeregion 14. This is because the current tries to follow the path of leastresistance. Thus little of the current passes through the center of theactive region 14. This concentrates light generation around theperiphery of the device and increases the loss associated with sidewallscattering. It also limits the number of carriers overlapping thefundamental mode of the waveguide. The finite resistance of the quantumwell diodes causes some of the carriers to spread but is not largeenough to prevent significant crowding. The low, but finite resistanceof the tunnel junction 16 of FIGS. 1 and 16 provides a relativelyconstant potential plane across the entire horizontal cross-section ofthe aperture or active region 14 to spread the current across the entireaperture. This provides current leveling across the entire aperture.

[0072]FIG. 19 shows I-V plots for three different types of tunneljunctions, including the n-type InP/p-type InAlAs junction describedabove. The resistivity of these layers is significant compared to theresistivity of one of the cladding layer 12 a. Indium phosphide, one ofthe materials which is suitable for forming the cladding layer 12 a, hasa resistivity of 5.8×10⁻³ ohm-cm for a doping level of only 5×10¹⁷ cm⁻³.Since these tunnel junctions can be made with InAlAs, its derivatives,and InP, they can be etched or oxidized and serve as the aperture layerand also provide a built-in current leveling layer for the aperture.

[0073]FIG. 20 provides an estimate of the current density versusdistance dependence which is derived for an InP current spreading layerwith an InP/InAlAs tunnel junction and the aperture in the same layer asthe tunnel junction. The calculation is based on a simple resistornetwork. The plot of FIG. 20 starts at the edge 23 of FIG. 21 at “0 μm”and moves towards the center of the aperture disk formed by the activeregion 14 at “15 μm”. The disk in this example thus has a diameter of 30μm. The current remains greater at the edge 23 than at the center of thedisk formed by the active region 14, however, the current levelingeffect is still significant compared to a device without the tunneljunction and is enough to allow practical intracavity devices. Thecurrent density in this example only varies by approximately 60% fromthe center of the aperture to the edge of the aperture.

[0074] It is to be understood that other embodiments may be utilized andstructural and functional changes may be made without departing from thescope of the present invention. The foregoing descriptions ofembodiments of the invention have been presented for the purposes ofillustration and description. It is not intended to be exhaustive or tolimit the invention to the precise forms disclosed. Accordingly, manymodifications and variations are possible in light of the aboveteachings. For example, may different sizes of apertures can be usedwhen selectively etching an active region. Also, different amounts ofmaterials used in the design of the various VCSEL components can be useddepending on design requirements. Furthermore, the VCSEL may be etchedfrom the substrate up through the bottom mirror portion and bottomcladding layer. It is therefore intended that the scope of the inventionbe limited not by this detailed description.

We claim:
 1. A semiconductor laser having low optical loss comprising:first and second photon reflecting mirrors aligned along a commonvertical axis; a first cladding layer sandwiched between the first andsecond photon reflecting mirrors along the vertical axis; an activeregion adjacent the first cladding layer along the vertical axis; acurrent and optical mode confining resistive aperture formed between thefirst and second mirrors for leveling the current density across thelateral surface of the aperture by providing a voltage drop in thedirection of the vertical axis along the lateral surface of theaperture; and a first electrical contact attached to the first thermallyand electrically conductive doped cladding layer for providing voltageto the resistive aperture and current to the active region to stimulatethe active region to lase.
 2. The semiconductor laser of claim 1 whereincurrent density varies by not more than approximately 60% from thecenter of the lateral surface of the aperture to the edge of theaperture.
 3. The semiconductor laser of claim 1 wherein the aperture isetched to have a lateral cross-sectional area less than a lateralcross-sectional area of the first photon reflecting mirror.
 4. Thesemiconductor laser of claim 1 wherein the aperture is a hole source. 5.The semiconductor laser of claim 4, wherein the hole source is comprisedof an n-type layer formed in the first cladding layer and a p-type layerformed in the active region.
 6. The semiconductor laser of claim 5,wherein the p-type layer is etched to form an aperture having a lateralcross-sectional area less than a lateral cross-sectional area of thefirst photon reflecting mirror while leaving the n-type layersubstantially in place to provide lateral conductivity between the firstelectrical contact and the active region.
 7. The semiconductor laser ofclaim 1 further comprising a second cladding layer on a side of theactive region opposite the first cladding layer along the vertical axis.8. The semiconductor laser of claim 7 further comprising a secondelectrical contact attached to the second cladding layer for providing acurrent path through resistive aperture and the active region tostimulate the active region to lase.
 9. The semiconductor laser of claim8 wherein the first and second cladding layers are thermally andelectrically conductive and n-type doped.
 10. The semiconductor laser ofclaim 4, wherein the hole source is a tunnel junction.
 11. Thesemiconductor laser of claim 5, wherein the n-type layer is comprised ofdoped InP and the p-type layer is comprised of doped InAlAs latticematched to InP.
 12. The semiconductor laser of claim 11, wherein then-type layer is doped with a donor including Silicon.
 13. Thesemiconductor laser of claim 11, wherein the p-type layer is doped withan acceptor including Carbon.
 14. The semiconductor laser of claim 5,wherein the n-type and p-type layers are each less than 200 Å thick. 15.The semiconductor laser of claim 1, wherein the aperture is located at astanding-wave null.
 16. The semiconductor laser of claim 5, wherein then-type layer of the hole source is doped to a density of approximately5×10¹⁸cm⁻³.
 17. The semiconductor laser of claim 5, wherein the n-typelayer of the hole source is doped with a donor containing Si.
 18. Thesemiconductor laser of claim 5, wherein the p-type layer of the holesource is doped to a density of approximately 1×10 ²⁰ cm⁻³.
 19. Thesemiconductor laser of claim 5, wherein the n-type layer of the holesource is doped with an acceptor containing Carbon.
 20. Thesemiconductor laser of claim 5, wherein the n-type layer has a lateralsurface extending beyond the lateral surface of the aperture to providelateral conductivity between the cladding layer and the active region.21. A method of leveling the current density across an aperture of asemiconductor laser comprising the steps of: axially injecting currentfrom a conducting cladding layer through a resistive aperture into anactive region; producing a voltage drop across the resistive aperture tolevel the current density across a lateral surface of the aperture;lasing the active region with the current passing through the aperture;and reflecting light repeatedly through the aperture using photonreflecting mirrors.
 22. The method of claim 21 wherein current densityvaries by not more than approximately 60% from the center of the lateralsurface of the aperture to the edge of the aperture.
 23. The method ofclaim 21 wherein the aperture is etched to have a lateralcross-sectional area less than a lateral cross-sectional area of atleast one of the photon reflecting mirrors.
 24. The method of claim 21wherein the aperture is a hole source.
 25. The method of claim 24,wherein the hole source is comprised of an n-type layer formed in thecladding layer and a p-type layer formed in the active region.
 26. Themethod of claim 25, wherein the p-type layer is etched to form anaperture having a lateral cross-sectional area less than a lateralcross-sectional area of one of the photon reflecting mirrors whileleaving the n-type layer substantially in place to provide lateralconductivity.
 27. The method of claim 21 wherein the cladding layer isthermally and electrically conductive and n-type doped.
 28. The methodof claim 24 wherein the hole source is a tunnel junction.
 29. The methodof claim 25 wherein the n-type layer is comprised of doped InP and thep-type layer is comprised of doped InAlAs lattice matched to InP. 30 Themethod of claim 25, wherein the n-type layer is doped with a donorincluding Silicon.
 31. The method of claim 25, wherein the p-type layeris doped with an acceptor including Carbon.
 32. The method of claim 25,wherein the n-type and p-type layers are each less than 200 Å thick. 33.The method of claim 21, wherein the aperture is located at astanding-wave null.
 34. The method of claim 25, wherein the n-type layerof the hole source is doped to a density of approximately 5×10¹⁸ cm⁻³.35. The method of claim 34, wherein the n-type layer of the hole sourceis doped with a donor containing Si.
 36. The method of claim 25, whereinthe p-type layer of the hole source is doped to a density ofapproximately 1×10²⁰cm⁻³.
 37. The method of claim 36, wherein the n-typelayer of the hole source is doped with an acceptor containing Carbon.38. A semiconductor laser having low optical loss comprising: a meansfor axially injecting current through an aperture and into an activeregion for lasing the active region; a means for producing a voltagedrop across the resistive aperture to level the current density across alateral surface of the aperture, thereby increasing light generation atthe center of the active region.